ARCv2: don’t assume core 0x54 has dual issue [Linux 5.0]

ARCv2: don’t assume core 0x54 has dual issue [Linux 5.0]

This Linux kernel change "ARCv2: don’t assume core 0x54 has dual issue" is included in the Linux 5.0 release. This change is authored by Vineet Gupta <vgupta [at] synopsys.com> on Thu Feb 21 13:44:49 2019 -0800. The commit for this change in Linux stable tree is 7b2e932 (patch).

ARCv2: don't assume core 0x54 has dual issue

The first release of core4 (0x54) was dual issue only (HS4x).
Newer releases allow hardware to be configured as single issue (HS3x)
or dual issue.

Prevent accessing a HS4x only aux register in HS3x, which otherwise
leads to illegal instruction exceptions

Signed-off-by: Vineet Gupta <[email protected]>

There are 34 lines of Linux source code added/deleted in this change. Code changes to Linux kernel are as follows.

 arch/arc/include/asm/arcregs.h |  8 ++++++++
 arch/arc/kernel/setup.c        | 26 +++++++++++++++++++++-----
 2 files changed, 29 insertions(+), 5 deletions(-)

diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index f1b86ce..a27eafd 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -151,6 +151,14 @@ struct bcr_isa_arcv2 {
 #endif
 };

+struct bcr_uarch_build_arcv2 {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+   unsigned int pad:8, prod:8, maj:8, min:8;
+#else
+   unsigned int min:8, maj:8, prod:8, pad:8;
+#endif
+};
+
 struct bcr_mpy {
 #ifdef CONFIG_CPU_BIG_ENDIAN
    unsigned int pad:8, x1616:8, dsp:4, cycles:2, type:2, ver:8;
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 93d4d66..7b23409 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -199,13 +199,29 @@ static void read_arc_build_cfg_regs(void)
        cpu->bpu.ret_stk = 4 << bpu.rse;

        if (cpu->core.family >= 0x54) {
-           unsigned int exec_ctrl;

-           READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
-           cpu->extn.dual_enb = !(exec_ctrl & 1);
+           struct bcr_uarch_build_arcv2 uarch;

-           /* dual issue always present for this core */
-           cpu->extn.dual = 1;
+           /*
+            * The first 0x54 core (uarch maj:min 0:1 or 0:2) was
+            * dual issue only (HS4x). But next uarch rev (1:0)
+            * allows it be configured for single issue (HS3x)
+            * Ensure we fiddle with dual issue only on HS4x
+            */
+           READ_BCR(ARC_REG_MICRO_ARCH_BCR, uarch);
+
+           if (uarch.prod == 4) {
+               unsigned int exec_ctrl;
+
+               /* dual issue hardware always present */
+               cpu->extn.dual = 1;
+
+               READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
+
+               /* dual issue hardware enabled ? */
+               cpu->extn.dual_enb = !(exec_ctrl & 1);
+
+           }
        }
    }

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