arm64: cpufeature: Fix feature comparison for CTR_EL0.{CWG,ERG} [Linux 4.9.189]

This Linux kernel change "arm64: cpufeature: Fix feature comparison for CTR_EL0.{CWG,ERG}" is included in the Linux 4.9.189 release. This change is authored by Will Deacon <will [at] kernel.org> on Mon Aug 5 18:13:55 2019 +0100. The commit for this change in Linux stable tree is 3c5dbb9 (patch) which is from upstream commit 147b963. The same Linux upstream change may have been applied to various maintained Linux releases and you can find all Linux releases containing changes from upstream 147b963.

arm64: cpufeature: Fix feature comparison for CTR_EL0.{CWG,ERG}

commit 147b9635e6347104b91f48ca9dca61eb0fbf2a54 upstream.

If CTR_EL0.{CWG,ERG} are 0b0000 then they must be interpreted to have
their architecturally maximum values, which defeats the use of
FTR_HIGHER_SAFE when sanitising CPU ID registers on heterogeneous
machines.

Introduce FTR_HIGHER_OR_ZERO_SAFE so that these fields effectively
saturate at zero.

Fixes: 3c739b571084 ("arm64: Keep track of CPU feature registers")
Cc: <stable@vger.kernel.org> # 4.9.y only
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

There are 15 lines of Linux source code added/deleted in this change. Code changes to Linux kernel are as follows.

 arch/arm64/include/asm/cpufeature.h | 7 ++++---
 arch/arm64/kernel/cpufeature.c      | 8 ++++++--
 2 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index 15868ec..e7bef3d 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -31,9 +31,10 @@

 /* CPU feature register tracking */
 enum ftr_type {
-   FTR_EXACT,  /* Use a predefined safe value */
-   FTR_LOWER_SAFE, /* Smaller value is safe */
-   FTR_HIGHER_SAFE,/* Bigger value is safe */
+   FTR_EXACT,          /* Use a predefined safe value */
+   FTR_LOWER_SAFE,         /* Smaller value is safe */
+   FTR_HIGHER_SAFE,        /* Bigger value is safe */
+   FTR_HIGHER_OR_ZERO_SAFE,    /* Bigger value is safe, but 0 is biggest */
 };

 #define FTR_STRICT true    /* SANITY check strict matching required */
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index e2ac72b..9a8e45d 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -152,8 +152,8 @@
    ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 30, 1, 0),
    ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 29, 1, 1),   /* DIC */
    ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 28, 1, 1),   /* IDC */
-   ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_SAFE, 24, 4, 0),  /* CWG */
-   ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_SAFE, 20, 4, 0),  /* ERG */
+   ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_OR_ZERO_SAFE, 24, 4, 0),  /* CWG */
+   ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_OR_ZERO_SAFE, 20, 4, 0),  /* ERG */
    ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, CTR_DMINLINE_SHIFT, 4, 1),
    /*
     * Linux can handle differing I-cache policies. Userspace JITs will
@@ -392,6 +392,10 @@ static s64 arm64_ftr_safe_value(const struct arm64_ftr_bits *ftrp, s64 new,
    case FTR_LOWER_SAFE:
        ret = new < cur ? new : cur;
        break;
+   case FTR_HIGHER_OR_ZERO_SAFE:
+       if (!cur || !new)
+           break;
+       /* Fallthrough */
    case FTR_HIGHER_SAFE:
        ret = new > cur ? new : cur;
        break;

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