PCI: tegra: Process pending DLL transactions before entering L1 or L2 [Linux 5.3]

This Linux kernel change "PCI: tegra: Process pending DLL transactions before entering L1 or L2" is included in the Linux 5.3 release. This change is authored by Manikanta Maddireddy <mmaddireddy [at] nvidia.com> on Tue Jun 18 23:31:50 2019 +0530. The commit for this change in Linux stable tree is 52db2fd (patch).

PCI: tegra: Process pending DLL transactions before entering L1 or L2

PM message are truncated while entering L1 or L2, which is resulting in
receiver errors. Set the required bit to finish processing DLLP before
link enter L1 or L2.

Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>

There are 11 lines of Linux source code added/deleted in this change. Code changes to Linux kernel are as follows.

 drivers/pci/controller/pci-tegra.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
index 3238db2..d079cde 100644
--- a/drivers/pci/controller/pci-tegra.c
+++ b/drivers/pci/controller/pci-tegra.c
@@ -212,6 +212,9 @@
 #define RP_VEND_CTL1   0x00000f48
 #define  RP_VEND_CTL1_ERPT (1 << 13)

+#define RP_VEND_XP_BIST    0x00000f4c
+#define  RP_VEND_XP_BIST_GOTO_L1_L2_AFTER_DLLP_DONE    (1 << 28)
+
 #define RP_VEND_CTL2 0x00000fa8
 #define  RP_VEND_CTL2_PCA_ENABLE (1 << 7)

@@ -538,6 +541,14 @@ static void tegra_pcie_enable_rp_features(struct tegra_pcie_port *port)
    value |= RP_VEND_XP_OPPORTUNISTIC_ACK;
    value |= RP_VEND_XP_OPPORTUNISTIC_UPDATEFC;
    writel(value, port->base + RP_VEND_XP);
+
+   /*
+    * LTSSM will wait for DLLP to finish before entering L1 or L2,
+    * to avoid truncation of PM messages which results in receiver errors
+    */
+   value = readl(port->base + RP_VEND_XP_BIST);
+   value |= RP_VEND_XP_BIST_GOTO_L1_L2_AFTER_DLLP_DONE;
+   writel(value, port->base + RP_VEND_XP_BIST);
 }

 static void tegra_pcie_program_ectl_settings(struct tegra_pcie_port *port)

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